This invention relates generally to systems and methods for producing electrical circuit elements for control. More particularly, the invention relates to the use of printing technology to manufacture electrical circuit control elements.
Most conventional electronic displays are driven by electrical circuit elements that are produced using a multistep process that makes extensive use of photolithographic patterning techniques. Photolithographic processes are technically well-suited for modern displays, offering high resolution capability and excellent device performance. Unfortunately, the capital equipment and related infrastructure associated with these processes is extremely expensive. It is therefore highly desirable to find lower-cost alternatives to conventional microfabrication processes.
Specifically, it is desirable to develop alternative processes that are all-additive; that is, functional materials are directly deposited in an arrangement that leads to the formation of functional electrical circuit elements. Moreover, such processes promise reduced material and consumable costs, dramatically simplified process flows, and higher throughput manufacturing.
In one aspect the invention relates to a method of manufacturing an addressing device for an electronic display. The method includes providing a substrate and fabricating the addressing device adjacent a surface of the substrate by treating the surface to control one of a contact angle of a liquid with the surface, a surface roughness and a surface energy, and printing at least one circuit element of the addressing device.
In one embodiment, the contact angle is controlled to be less than 90 degrees. In a preferred embodiment, the contact angle is controlled to be less than 60 degrees.
In another aspect, the invention relates to a method of manufacturing an addressing device for an electronic display. The method includes providing a substrate, and fabricating the addressing device adjacent a surface of the substrate by printing at least one circuit element by (i) screen printing a gate structure, (ii) ink jet printing a dielectric material and a semiconductor, (iii) screen printing coarse features of a source structure and a drain structure, and (iv) printing by use of soft lithography the high resolution features of the source structure and the drain structure. In one embodiment, screen printing involves using a conductive paste. The conductive paste has a viscosity between about 1000 cP and about 50000 cP.
In another embodiment, the method includes printing an encapsulant for protecting a portion of the addressing device. In still another embodiment, the method includes ink jet printing at least one circuit element using an ink having a viscosity of less than about 100 cP. In another embodiment, ink jet printing involves using a plurality of particles that are smaller than xc2xc of a diameter of an orifice of an ink jet head. In a preferred embodiment, ink jet printing is performed using a plurality of particles that are smaller than {fraction (1/10)} of a diameter of an orifice of an ink jet head.
In another embodiment, the method includes ink jet printing at least one circuit element using an ink comprising a semiconductor dissolved in a solvent. In another embodiment, ink jet printing includes ink jet printing using an ink comprising a dielectric material dissolved in a solvent.
In still another embodiment, the method includes ink printing at least one circuit element by moving an ink jet head relative to the substrate at a speed U, where U is less than the quantity 2RF, where R is a drop radius and F is a drop ejection frequency.
In a further embodiment, ink jet printing includes freezing an ink jet drop upon the substrate upon impact. In yet another embodiment, an ink jet drop is frozen by independent control of the substrate temperature.
In an additional embodiment, printing by use of soft lithography includes printing at least one element by microcontact printing using one of an elastomeric stamp and a rigid stamp. In still further embodiments, printing by use of soft lithography includes printing through one of a contact mask and a proximity mask, printing at least one circuit element using one of evaporation, sputtering and chemical vapor deposition, and printing at least one element by transferring an ink from a mold to the substrate and curing the ink. In another embodiment, printing by use of soft lithography includes printing at least one circuit element using a mold having the surface property that an ink when dried adheres preferentially to a surface upon which the ink is being printed rather than to the mold.
In yet further embodiments, ink jet printed semiconductor material is selected from the class of materials consisting of polythiophenes, oligothiophenes, polythienylenevinylene, polyphenylenevinylene, and their derivatives, and colloidal suspensions of inorganic semiconductive particles, and ink jet printed insulating material is selected from the class of materials consisting of soluble polymers, glasses, inorganic films, and composite materials.
In still an additional embodiment, an ink jet printing step is replaced by a printing step involving a vacuum based process selected from evaporation, sputtering, reactive gas processing and chemical vapor deposition.
In other embodiments, a screen printing step is replaced by a printing step involving a vacuum based process selected from evaporation, sputtering, reactive gas processing and chemical vapor deposition, a step involving printing using soft lithography is replaced by a printing step involving a vacuum based process selected from evaporation, sputtering, reactive gas processing and chemical vapor deposition, and a plurality of, but not all, steps are replaced by a plurality of printing steps, each of the plurality of printing steps involving a vacuum based process selected from evaporation, sputtering, reactive gas processing and chemical vapor deposition.
In another aspect, the invention relates to a method of manufacturing an electronic device. The method includes (a) providing a substrate, (b) depositing a gate structure on the substrate using flexo-gravure printing, and (c) depositing a layer of dielectric material using slot coating, the layer of dielectric material covering the gate structure and a portion of the substrate. The method also includes (d) depositing adjacent the dielectric layer on a side thereof opposite the gate structure using screen printing a low resolution feature of a source structure and a low resolution feature of a drain structure, the source structure and the drain structure being deposited in a patterned structure having a space therebetween, (e) depositing a semiconductor material adjacent the dielectric layer in the space between the source structure and the drain structure using ink jet printing, and (f) disposing at least one electronic element adjacent the addressing device, such that the addressing device addresses the at least one electronic element to control a behavior of the electronic element.
In one embodiment the method can additionally include, after step (c) and before step (d), depositing adjacent the dielectric layer on a side thereof opposite the gate structure a high resolution feature of a source structure and a high resolution feature of a drain structure using soft lithography techniques, the source structure and the drain structure having a space therebetween.
In another aspect, the invention relates to a transistor for addressing an electronic display. The transistor includes a substrate, a gate structure disposed adjacent a portion of the substrate, the gate structure formed by flexo-gravure printing, and a dielectric film disposed adjacent the gate and the substrate, the dielectric film formed by slot coating. The transistor also includes a source and a drain disposed adjacent the dielectric film, the source and the drain separated one from the other, the source and the drain formed using at least one of soft lithography and screen printing, and a semiconductor film disposed adjacent a portion of the dielectric film and between the source and the drain, the semiconductor film formed by ink-jet printing. wherein a selected one of the source and the drain is in electrical communication with a pixel electrode.
In one aspect, the invention features a method of manufacturing an addressing device for an electronic display comprising: (a) providing a substrate; and (b) fabricating the addressing device adjacent a surface of the substrate using one or more all-additive fabrication processes. In preferred embodiments, step b) comprises fabricating the addressing device by xe2x80x9cprintingxe2x80x9d at least one circuit element of the addressing device. The printing can be performed using any appropriate printing step including: screen printing; stencil printing; ink-jet printing; soft lithography; offset, flexographic, intaglio, or gravure printing; or similar methods known to those skilled in the field. In another embodiment, step b) comprises using at least two different additive steps.
In another embodiment, step b) comprises printing a conductive line, a resistor, an electrode, an encapsulant for at least one circuit element, a diode or portion thereof, a varistor or portion thereof, or a field effect transistor or portion thereof. In preferred embodiments, printed elements are combined together to form a passive matrix array, a control grid structure, a diode array, a varistor array, a field effect transistor based active matrix array, logic circuits, or other complex circuits.
In one embodiment, step b) comprises printing at least one circuit element using a conducting paste (e.g. graphite, silver, gold, or nickel particles dispersed in a polymeric material). In a detailed embodiment, step b) comprises printing at least one circuit element using a conductive paste having a viscosity of between about 1000 cP and about 50000 cP.
In one embodiment, step b) comprises printing at least one circuit element by: b1) dissolving an ink material in a solvent; b2) printing the ink material on the substrate; and b3) removing the solvent. In another detailed embodiment, step b) comprises printing at least one circuit element by b1) printing a photocurable ink material on the substrate; and b2) curing the ink material by photoexposure.
In another embodiment, step b) comprises printing a conductive polymer or a colloidal dispersion of conductive particles. In a detailed embodiment, step b) comprises the use of ink jet, offset, flexographic, intaglio, or gravure printing of at least one circuit element using a conductive material with a viscosity of less than about 1000 cP.
In one embodiment, step b) comprises ink jet printing at least one circuit element using a dielectric dissolved in a solvent. Alternatively, step b) can comprise ink jet printing at least one circuit element using a semiconducting material dissolved in a solvent.
In one detailed embodiment, step b) comprises ink jet printing at least one circuit element using a plurality of particles that are so small that they do not substantially clog the orifice of an ink jet print head. This is best accomplished when the particles are smaller than about xc2xc of the diameter of the orifice, but to achieve high yield it is preferable that the particles are smaller than {fraction (1/10)} of a diameter of the orifice.
In one embodiment, step b) comprises ink jet printing at least one circuit element by moving an ink jet head relative to the substrate at a speed such that the drops print a continuous line (i.e. traverse speed U less than 2RF, where R is a drop radius and F is a drop ejection frequency). In another embodiment, step b) comprises ink jet printing at least one circuit element by solidifying an ink-jetted drop on the substrate upon impact with the substrate.
In another embodiment, step b) comprises printing at least one circuit element by printing a functional material using an elastomeric or rigid stamp or printing plate. In a detailed embodiment, step b) comprises printing at least one circuit element by transferring an ink from a mold to the substrate and thereafter curing the ink. In another detailed embodiment, step b) comprises printing at least one circuit element by transferring an ink from a mold to the substrate after the ink has been substantially cured while in contact with the mold.
To produce continuous (i.e. unbroken) fine lines in embodiments involving wet printing, particularly in those embodiments which make use of materials with viscosities less than a few thousand cP, it is preferable to treat the substrate surface to adjust the equilibrium contact angle of the liquid on the surface. This may be done by applying a chemical treatment (e.g. hexamethyldisilazane, octadecyltrichlorosilane, or similar materials), by exposing the surface to a plasma treatment, or using other methods known to those skilled in the field. It is preferable for these embodiments that the surface energy of the substrate be adjusted such that the equilibrium contact angle of the liquid on the surface is substantially less than 90 degrees, preferably less than 60 degrees. This helps to ensure that long, slender beads of liquid do not break up into discrete drops due to capillary instability or disjoining pressure.
In another embodiment, step b) comprises forming at least one circuit element through vacuum-based deposition including but not limited to: evaporation, sputtering or chemical vapor deposition.
The circuit element can be printed using colloidal conductive particles, carbon, graphite, silver, nickel, palladium, or metal oxides. The circuit elements can be printed using polyaniline, polyethyldioxithiophene, or other conductive polymers. The circuit elements can be deposited using an inorganic semiconductor such as silicon, cadmium selenide, or gallium arsenide. The circuit elements can be printed using organic semiconductors, such as poly(3-alkyl)thiophene, hexathiophene and other oligothiophenes, xcex1, xcfx89-dihexyl quaterthiophene and other alkylsubstituted oligithiophenes, and other soluble organic semiconductors. The circuit elements can also be printed using a dielectric material such as benzocyclobutene (Dow Chemical), polyimids, polyvinylphenol, or spin-on-glass materials.
In the preferred embodiment, step b) comprises printing at least one circuit element by using: b1) screen, offset, flexographic, intaglio, gravure, or ink jet printing to define the gate structure; b2) slot, dip, knife-over-roll, or spin coating, offset, flexographic, intaglio, gravure, or ink jet printing, or vacuum deposition techniques to deposit dielectric material; b3) slot, dip, knife-over-roll, or spin coating, offset, flexographic, intaglio, gravure, or ink jet printing, or vacuum deposition techniques to deposit semiconducting material; b4) screen, offset, flexographic, gravure, or ink jet printing to define the source and drain structure. For some designs, it is essential that the source and drain structure comprise high resolution features, which may be formed using soft lithography techniques or photolithographic patterning (i.e. subtractive) techniques.
In another aspect, the invention features a method of making an electronic display comprising the steps of: (a) providing a substrate; (b) providing an electronic display media adjacent the substrate; and (c) fabricating the addressing device adjacent a surface of the substrate using an additive fabrication process. In one embodiment, the electronic display media comprises an encapsulated electronic display media. In one detailed embodiment, the encapsulated electronic display media includes electrophoretic particles dispersed in a fluid.
In still another aspect, the invention features a method of making an electronic device comprising: (a) fabricating a first portion of the device using a first additive fabrication process; and (b) fabricating a second portion of the device using a second additive fabrication process different from the first additive fabrication process.
In still another aspect, the invention features a transistor for addressing an electronic display. In one embodiment, the transistor comprises: a substrate; a gate disposed adjacent a portion of the substrate; a dielectric film disposed adjacent the gate and the substrate; a semiconductor film disposed adjacent a portion of the dielectric film; a drain disposed adjacent the semiconductor film; and a source disposed adjacent the semiconductor film, wherein the source is in electrical communication with a pixel electrode.
In another embodiment, the transistor comprises: a substrate; a source and a drain disposed adjacent a portion of the substrate; a semiconductor film disposed adjacent the source, the substrate and the drain; a dielectric film disposed adjacent the semiconductor film; and a gate disposed adjacent a portion of the semiconductor film, wherein the source is in electrical communication with a pixel electrode.
In another embodiment, the transistor comprises: a substrate; a gate disposed adjacent a portion of the substrate; a dielectric film disposed adjacent the gate and the substrate; a semiconductor film disposed adjacent a portion of the dielectric film; a source and a drain disposed adjacent a portion of the semiconductor film; an insulator film disposed adjacent the drain, the semiconductor film and a portion of the source; and a pixel electrode disposed adjacent the insulator film and the source, wherein the insulator film isolates the source from the drain and the pixel electrode from the drain.
In still another embodiment, the transistor comprises: a substrate; a source and a drain disposed adjacent the substrate; a semiconductor film disposed adjacent the source, the drain and the substrate; a dielectric film disposed adjacent the semiconductor film; a gate disposed adjacent the dielectric film; an insulator film disposed adjacent the gate and the dielectric film; and a pixel electrode disposed adjacent the insulator film, wherein the pixel electrode is in electrical communication with the source through the insulator film and the semiconductor film.
In still another embodiment, the transistor comprises: a substrate; a gate disposed adjacent the substrate; a dielectric film disposed adjacent the substrate and the gate; a semiconductor film disposed adjacent the dielectric film; a drain and a source disposed adjacent the semiconductor film; an insulator film disposed adjacent the semiconductor film; and a pixel electrode disposed adjacent the source and the insulator film, wherein the insulator film isolates the pixel electrode from the semiconductor film.
In yet another embodiment, the transistor comprises: a substrate; a gate disposed adjacent the substrate; a dielectric film disposed adjacent the gate and the substrate; a semiconductor film disposed adjacent the dielectric film; a drain and source disposed adjacent the semiconductor film; an insulator film disposed adjacent the drain, the semiconductor film and the source; and a pixel electrode disposed adjacent the insulator film, wherein the pixel electrode is isolated from the drain through the insulator film and the pixel electrode is in electrical communication with the source.
In yet another embodiment, the transistor comprises: a substrate; a gate disposed adjacent the substrate; a dielectric layer disposed adjacent the gate and the substrate; a drain and a source disposed adjacent the dielectric layer; and a semiconductor film disposed adjacent the drain, the dielectric layer and the source.